Affiliation:
1. Department of Electrical Engineering and Green Technology Research Center, School of Electrical and Computer Engineering; College of Engineering, Chang Gung University; Tao-Yuan City Taiwan, R.O.C
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials
Reference13 articles.
1. A wide range delay-locked loop with a fixed latency of one clock cycle;Chang;IEEE Journal of Solid-State Circuits,2002
2. A 120-420 MHz delay-locked loop with multi-band voltage-controlled delay unit;Kuo;International Journal of Circuit Theory and Applications,2012
3. Reduction of pump current mismatch in charge-pump PLL;Hwang;Electronics Letters,2009
4. A digital calibration technique for charge pumps in phase-locked systems;Liang;IEEE Journal of Solid-State Circuits,2008
5. K. Cheng C. Su M. Wu Y. Chang A wide-range DLL-based clock generator with phase error calibration 15th IEEE International Conference on Electronics, Circuits and Systems (ICECS 2008) 2008 798 801
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