Affiliation:
1. Computer Science and Engineering Siksha O Anusandhan Bhubaneswar India
2. Department of Computer Science University of Pisa Pisa Italy
3. Computer Science and Information Technology Siksha O Anusandhan Bhubaneswar India
4. Information Technology University of Calcutta West Bengal India
5. Computer Science and Engineering University of California Davis USA
Abstract
SummaryThe growing sophistication of cyber attacks, vulnerabilities in high computing systems and increasing dependency on cryptography to protect our digital data, make it more important to keep secret keys safe and secure. A few major issues of secret keys, like incorrect use of keys, inappropriate storage of keys, inadequate protection of keys, insecure movement of keys, lack of audit logging, insider threats and nondestruction of keys can compromise the whole security system severely. In this work, we propose a field programmable gate array (FPGA)‐based trusted platform module (TPM) framework for operating system companies and OS users, utilizing blockchain to address NIST‐recommended secret key management issues. The security processor used in OS user machines is partitioned into three areas such that processor area, confidential area, and crypto area. The isolated secret key memory in confidential area, along with a private blockchain (BC) can log the life cycle of secret keys of TPM standard. We have also implemented a special custom bus interconnect, which receives custom crypto instructions from Processing Element (PE). During the execution of crypto instructions, the architecture ensures that secret keys are present in confidential area and crypto area but never in the processor area. The movements of secret keys between confidential area, and crypto area are recorded cryptographically after the proper authentication process controlled by the proposed hardware‐based private BC framework. To the best of our knowledge, this work is the first attempt to implement a blockchain‐based framework between OS company and OS users to address NIST recommended secret key management issues of TPM standard hardware environment. The additional cost of resource usage and timing complexity we spent to implement the proposed idea is nominal. The proposed architecture is implemented with Xilinx EDA tool using FPGA board.
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