A high-performance architecture for variable length instructions
Author:
Publisher
Wiley
Subject
Computational Theory and Mathematics,Hardware and Architecture,Information Systems,Theoretical Computer Science
Reference7 articles.
1. W.D. Strecker. VAX11/780: A Virtual Address Extension to the DEC PDP-11 Family, Proc. of the NCC, pp. 967â980 (June 1978).
2. Nebura: a new architecture and its relationship to computer hardware;Szewerenko;I.E.E.E. Computer,1981
3. A.D. Berenbaum et al. The operating system and language support features of the BELLMAC-32 microprocessor, Proc. Sympo. on Architectural Support for Systems, pp. 30â38 (Mar. 1982).
4. The Instruction Decoding Unit for the VLSI 432 General Data Processor;Bayliss;I.E.E.E. J. of Solid-State Circuits,1981
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