An adaptive continuous-time incremental Σ∆ ADC for neural recording implants

Author:

Barati Saeid1ORCID,Yavari Mohammad1

Affiliation:

1. Integrated Circuits Design Laboratory, Department of Electrical Engineering; Amirkabir University of Technology (Tehran Polytechnic); Tehran Iran

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference31 articles.

1. An implantable 64-channel wireless microsystem for single-unit neural recording;Sodagar;IEEE J Solid-State Circuits,Sept. 2009

2. System-level design of a 64-channel low power neural spike recording sensor;Delgado-Restituto;IEEE Trans Biomed Circuits Syst,Apr. 2017

3. A 0.45 V 100-channel neural-recording IC with sub-μW/channel consumption in 0.18 μW CMOS;Han;IEEE Trans Biomed Circuits Syst,Dec. 2013

4. A 128-channel 6 mW wireless neural recording IC with spike feature extraction and UWB transmitter;Chae;IEEE Trans Neural Syst Rehabil Eng,Aug. 2009

5. Design of low-voltage front-end interface for switched op amp circuits;Karthikeyan;IEEE Trans Circuits Syst II, Analog Digit Signal Process,Jul. 2001

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