Semi‐tensor product‐based algebra‐logic mixed representation and fault diagnosis for a class of gate networks

Abstract

AbstractThis article studies an algebra‐logic mixed representation of gate networks and its application to stuck‐at fault diagnosis. First, the gate network is characterized through a logic expression of disjoint sum‐of‐products, and the system structure of the gate network is described based on 2‐to‐1 multiplexers. Then, by resorting to the semi‐tensor product of matrices, a novel algebra‐logic mixed representation is proposed for the gate network through its logic expression and system structure. Furthermore, a novel stuck‐at fault diagnosis algorithm for the gate network is presented, where the stuck‐at fault testability of the gate network is equivalent to the solution existence of the system of linear equations. Finally, the fault diagnosis of the 4‐bit carry look‐ahead adder is carried out to demonstrate the effectiveness and feasibility of the proposed theoretical approach and algorithms.