A new single-phase multilevel converter topology with reduced power electronic devices, voltage rating on switches, and power losses

Author:

Alishah Rasoul Shalchi1ORCID,Hosseini Seyed Hossein12,Babaei Ebrahim12ORCID,Sabahi Mehran1ORCID

Affiliation:

1. Faculty of Electrical and Computer Engineering; University of Tabriz; Tabriz Iran

2. Engineering Faculty; Near East University of North Cyprus; Nicosia 99138 Turkey

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Cited by 15 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A PLL‐less grid‐tied three‐phase multilevel inverter with reduced device count and LCL filter;International Journal of Circuit Theory and Applications;2024-07-26

2. Reliability evaluation of carrier‐based pulse width modulated three‐level F‐type neutral point clamped inverter with power loss analysis;International Journal of Circuit Theory and Applications;2023-07-30

3. A hybrid five‐level inverter configuration with improved reliability and reduced number of components;International Journal of Circuit Theory and Applications;2022-07-20

4. Operation, analysis, and implementation of a reduced device count asymmetrical multilevel inverter;International Journal of Circuit Theory and Applications;2021-11-21

5. Analysis and implementation of a new asymmetric double H‐bridge multilevel inverter;International Journal of Circuit Theory and Applications;2021-06-26

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