42.1:Distinquished Paper: A 1.4-Gbps Intra-Panel Interface for Chip-On-Glass TFT-LCD Applications
Author:
Publisher
Wiley
Reference3 articles.
1. D. H. Baek et al The enhanced Reduced Voltage Differential Signaling (eRVDS) Interface with Clock Embedded Scheme for Chip-On-Glass TFT-LCD Applications 70 73 2010
2. A. Erhart et al Charge conservation implantation in an ultra-low power AMLCD column driver utilizing pixel inversion 23 26 1997
3. Hitachi Corp. 1993
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1. A timing controller embedded driver IC with 3.24-Gbps eDP interface for chip-on-glass TFT-LCD applications;Journal of the Society for Information Display;2016-05
2. P-39: High Speed and Power-Saving Interface for High-Resolution and Low Power Display Panel;SID Symposium Digest of Technical Papers;2015-06
3. P-175L:Late-News Poster: A 2.0Gbps Intra-Panel Interface with Automatic Calibration for Chip-On-Glass Super-High-Definition TFT-LCD Applications;SID Symposium Digest of Technical Papers;2014-06
4. 22.4:Invited Paper: A 1.8-Gbps Intra-Panel Interface with Power Reduction and EMI Suppression Schemes for Tablet PC Applications;SID Symposium Digest of Technical Papers;2014-06
5. 22.2: WITHDRAWN: 22.3:Invited Paper: Intra-Panel Interface Technology for High-Resolution Tablet PC Applications;SID Symposium Digest of Technical Papers;2014-06
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