Fully Hardware Memristive Neuromorphic Computing Enabled by the Integration of Trainable Dendritic Neurons and High‐Density RRAM Chip

Author:

Yang Zhen1,Yue Wenshuo1,Liu Chang1,Tao Yaoyu12,Tiw Pek Jun1,Yan Longhao1,Yang Yuxiang13,Zhang Teng1,Dang Bingjie1,Liu Keqin1,He Xiaodong4,Wu Yongqin4,Bu Weihai4,Zheng Kai4,Kang Jin4,Huang Ru1,Yang Yuchao125ORCID

Affiliation:

1. Beijing Advanced Innovation Center for Integrated Circuits School of Integrated Circuits Peking University Beijing 100871 China

2. Center for Brain Inspired Chips Institute for Artificial Intelligence Frontiers Science Center for Nano‐optoelectronics Peking University Beijing 100871 China

3. Guangdong Provincial Key Laboratory of In‐Memory Computing Chips School of Electronic and Computer Engineering Peking University Shenzhen 518055 China

4. Semiconductor Technology Innovation Center (Beijing) Corporation Beijing 100176 China

5. Center for Brain Inspired Intelligence Chinese Institute for Brain Research (CIBR) Beijing 102206 China

Abstract

AbstractComputing‐in‐memory (CIM) architecture inspired by the hierarchy of human brain is proposed to resolve the von Neumann bottleneck and boost acceleration of artificial intelligence. Whereas remarkable progress has been achieved for CIM, making further improvements in CIM performance is becoming increasingly challenging, which is mainly caused by the disparity between rapid evolution of synaptic arrays and relatively slow progress in building efficient neuronal devices. Specifically, dedicated efforts are required toward developments of more advanced activation units in terms of both optimized algorithms and innovative hardware implementations. Here a novel bio‐inspired dendrite function‐like neuron based on negative‐differential‐resistance (NDR) behavior is reported and experimentally demonstrates this design as a more efficient neuron. By integrating electrochemical random‐access memory (ECRAM) with ionic regulation, the tunable NDR neuron can be trained to enhance neural network performances. Furthermore, based on a high‐density RRAM chip, fully hardware implementation of CIM is experimentally demonstrated by integrating NDR neuron devices with only a 1.03% accuracy loss. This work provides 516 × and 1.3 × 105 × improvements on LAE (Latency‐Area‐Energy) property, compared to the digital and analog CMOS activation circuits, respectively. With device‐algorithm co‐optimization, this work proposes a compact and energy‐efficient solution that pushes CIM‐based neuromorphic computing into a new paradigm.

Funder

National Key Research and Development Program of China

Natural Science Foundation of Beijing Municipality

Higher Education Discipline Innovation Project

National Natural Science Foundation of China

Publisher

Wiley

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