Tiling on systems with communication/computation overlap

Author:

Calland Pierre-Yves,Dongarra Jack,Robert Yves

Publisher

Wiley

Subject

General Engineering

Reference24 articles.

1. , , and , ‘Hierarchical tiling: a methodology for high performance’, Technical Report CS-96-508, University of California at San Diego, San Diego, CA, 1996, available at http://www.cse.ucsd.edu/˜carter

2. Software Libraries for Linear Algebra Computations on High Performance Computers

3. ScaLAPACK: a portable linear algebra library for distributed memory computers — design issues and performance

4. An introduction to a formal theory of dependence analysis

5. A loop transformation theory and an algorithm to maximize parallelism

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1. Topology and computational-power aware tile mapping of perfectly nested loops with dependencies on distributed systems;Journal of Parallel and Distributed Computing;2019-07

2. The Effect of Process Topology and Load Balancing on Parallel Programming Models for SMP Clusters and Iterative Algorithms;The Journal of Supercomputing;2006-01

3. A Case for Non-blocking Collective Operations;Frontiers of High Performance Computing and Networking – ISPA 2006 Workshops;2006

4. Time-minimal tiling when rise is larger than zero;Parallel Computing;2002-06

5. Communication policies performance: a case study;Proceedings Ninth Euromicro Workshop on Parallel and Distributed Processing

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