High‐performance SIMD implementation of the lattice‐Boltzmann method on the Xeon Phi processor-Reference-Cited by-同舟云学术

High‐performance SIMD implementation of the lattice‐Boltzmann method on the Xeon Phi processor

Published:2018-11-18 Issue:13 Volume:31 Page:e5072
ISSN:1532-0626
Container-title:Concurrency and Computation: Practice and Experience
language:en
Short-container-title:Concurrency Computat Pract Exper

Author:

Robertsén Fredrik¹²^ORCID,Mattila Keijo³⁴,Westerholm Jan²

Affiliation:

1. CSC ‐ IT center for science Espoo Finland

2. Faculty of Science and EngineeringÅbo Akademi University Åbo Finland

3. Faculty of Information TechnologyUniversity of Jyväskylä Jyväskylä Finland

4. Department of PhysicsTampere University of Technology Tampere Finland

Publisher

Wiley

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Computer Science Applications,Theoretical Computer Science,Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/cpe.5072

Reference47 articles.

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2. Lal ShimpiA.Inside the Titan supercomputer: 299k AMD x86 cores and 18.6k NVIDIA GPUs.2012.https://www.anandtech.com/show/6421/inside-the-titan-supercomputer-299k-amd-x86-cores-and-186k-nvidia-gpu-cores. Accessed September 9 2017.

3. NVIDIA.NVIDIA CUDA compute unified device architecture programming guide.2017.

4. Intel.Intel delivers new architecture for discovery with Intel Xeon Phi coprocessors.https://newsroom.intel.com/news-releases/intel-delivers-new-architecture-for-discovery-with-intel-xeon-phi-coprocessors/. Accessed September 9 2017.

5. ChrysosG.Intel Xeon Phi X100 family coprocessor ‐ the architecture.2012.

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