Affiliation:
1. Digital Holography Research Section Electronics and Telecommunications Research Institute
Abstract
In this paper, we present a fast and efficient scalable holographic video processor using a layer‐based method, which employs a modified inverse Fresnel transform. To verify the performance of the proposed architecture, we design a single‐layered holography core using a fixed‐point model and test its performance on a field‐programmable gate array. The implemented real‐time hologram processor features a 1k × 1k size fast Fourier transform and a 30 frames/sec conversion rate in 4K color spatial light modulators after applying 2× linear interpolation. All real‐time images on computer screens, such as YouTube and movies, are converted into holograms within 22 ms.
Reference13 articles.
1. Recent progress in computer-generated holography for three-dimensional scenes
2. A new objective quality metric for phase hologram processing
3. A single-chip FPGA holographic video processor;Kim H;IEEE Transactions on Industrial Electronics,2018
4. Real-time electroholography using a multiple-graphics processing unit cluster system with a single spatial light modulator and the InfiniBand network;Niwase Hiroaki;Optical Engineering,2016
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