Automatic extraction technique of CD‐SEM evaluation points to measure semiconductor overlay error-Reference-Cited by-同舟云学术

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Automatic extraction technique of CD‐SEM evaluation points to measure semiconductor overlay error

Published:2019-01-08 Issue:3 Volume:102 Page:36-44
ISSN:1942-9533
Container-title:Electronics and Communications in Japan
language:en
Short-container-title:Electron Comm Jpn

Author:

Miyamoto Atsushi¹,Kawahara Toshikazu²

Affiliation:

1. Hitachi, Ltd., Research & Development Group Japan

2. Hitachi High‐Technologies Corporation Japan

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Networks and Communications,General Physics and Astronomy,Signal Processing

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/ecj.12147

Reference16 articles.

1. International Technology Roadmap for Semiconductors 2.0 2015 Edition (2015).

2. Ultimately accurate SRAF replacement for practical phases using an adaptive search algorithm based on the optimal gradient method

3. Physical simulation for verification and OPC on full chip level

4. Process optimization through model based SRAF printing prediction

5. Multiple‐image‐depth modeling for hotspot and AF printing detections;Tang YP;Proc SPIE,2012

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1. Improved MSRN-Based Attention Block for Mask Alignment Mark Detection in Photolithography;Applied Sciences;2022-03-06

2. Three-dimensional structure recognition of circuit patterns on semiconductor devices using multiple SEM images detected in different electron scattering angles;Microelectronics Reliability;2020-05

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