A 60-GHz single-pole-single-throw switch in 65-nm bulk CMOS
Author:
Publisher
Wiley
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1002/mmce.20503/fullpdf
Reference25 articles.
1. A 31.3-dBm bulk CMOS T/R switch using stacked transistors with sub-design-rule channel length in floated p-wells;Xu;IEEE J Solid State Circ,2007
2. A Fully Integrated Ultra-Low Insertion Loss T/R Switch for 802.11b/g/n Application in 90 nm CMOS Process;Kidwai;IEEE J Solid State Circ,2009
3. C.-T. Fu S.S. Taylor C.-N. Kuo A 5-GHz, 30-dBm, 0.9-dB insertion loss single-pole double-throw T/R switch in 90nm CMOS 2008 317 320
4. S. Kishimoto N. Orihashi Y. Hamada M. Ito K. Maruhashi A 60-GHz band CMOS phased array transmitter utilizing compact baseband phase shifters 2009 215 218
5. Y. Yu P. Baltus A. van Roermund A. de Graauw E. van der Heijden M. Collados C. Vaucher A 60 GHz digitally controlled RF-beamforming receiver frond-end in 65 nm CMOS 2009 211 214
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1. An ultrawideband SPST switch using defected ground structure low pass filter in 65-nmCMOS technology;International Journal of RF and Microwave Computer-Aided Engineering;2015-05-20
2. A novel 3D cavity diplexer with compact size using LTCC technologies for V-band wireless communication systems;International Journal of RF and Microwave Computer-Aided Engineering;2014-06-18
3. Design and layout techniques for a mm-wave body-biased variable-gain amplifier;International Journal of RF and Microwave Computer-Aided Engineering;2013-10-29
4. Multifingers capacitances modeling of 65-Nm CMOS transistor by unit cell method;International Journal of RF and Microwave Computer-Aided Engineering;2012-02-23
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