An exercise on hardware/software codesign following the RISC model
Author:
Affiliation:
1. Division of Electronics and Communication Engineering; Netaji Subhas Institute of Technology; New Delhi 110078 India
2. Division of Computer Engineering; Netaji Subhas Institute of Technology; New Delhi 110078 India
Publisher
Wiley
Subject
General Engineering,Education,General Computer Science
Link
http://onlinelibrary.wiley.com/wol1/doi/10.1002/cae.21711/fullpdf
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4. Reduced instruction set computers;Patterson;Commun ACM,1985
5. C. A. Baxley , Jr. F. A. Zapka 1985 258 265
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