Process-graph analyser: A front-end tool for VHDL behavioural synthesis

Author:

Bhasker J.

Publisher

Wiley

Subject

Software

Reference18 articles.

1. and , ‘State synthesis and connectivity binding for microarchitecture’, Proc. ICCAD–86, 1986, pp. 210–213.

2. and , ‘MAHA: a program for datapath synthesis’, Proc. 23rd Design Automation Conf., 1986, pp. 461–466.

3. and , ‘HAL: a multi-paradigm approach to automatic data path synthesis’, Proc. 23rd Design Automation Conf., 1986, pp. 263–270.

4. Automated Synthesis of Data Paths in Digital Systems

5. Flamel: A High-Level Hardware Compiler

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An asynchronous model for high-level synthesis;Microelectronics Journal;1994-05

2. An architectural design support environment for high-performance digital systems;Microprocessing and Microprogramming;1991-08

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