Synergic Effect of Misaligned Gate and Temperature on Hetero‐Dielectric Double‐Gate Junctionless Metal–Oxide‐Semiconductor Field‐Effect Transistors for High‐Frequency Application

Abstract

Junctionless metal–oxide‐semiconductor field‐effect transistors (MOSFETs) have emerged as a promising alternative to conventional MOSFETs, offering simplified fabrication and potential performance improvements. The novelty of this research lies in the selection of hetero‐dielectric material to optimize the performance of junctionless transistors under the misaligned gate and high‐temperature conditions, and the aim is to explore its capability for low‐power high‐frequency application. The results reveal that the proposed junctionless field effect transistor exhibits increased transconductance (17 mS), which enables higher gain (311 dB) and diminishes capacitive effects, leading to a broader range of cutoff frequencies (154 GHz) with gain frequency product and gain transconductance frequency product are 31 and 95.9 THz, respectively. Moreover, this research article investigates critical reliability issues related to junctionless MOSFET, focusing on gate misalignment and thermal stability. The study reveals that gate misalignment reduces on‐current and degrades device performance. Additionally, the study examines thermal stability over a wide temperature range (300 to 500 K), exploring the impact of temperature on performance. These valuable findings provide crucial insights to overcome fabrication challenges and drive the practical adoption of junctionless MOSFETs in future integrated circuits. To assess device performance in high‐frequency applications, Silvaco ATLAS TCAD tools are employed.