Cascaded Logic Gates with Printed Electrochemical Memristors

Author:

Grant Benjamin12ORCID,Wanless Travis12,Bandera Yuriy12,Noor Haris2,Poole Nathan3,Chang Shu3,Foulger Stephen H.124ORCID

Affiliation:

1. Center for Optical Materials Science and Engineering Technologies (COMSET) Clemson University Anderson SC 29625 USA

2. Department of Materials Science and Engineering Clemson University Clemson SC 29634 USA

3. Department of Graphic Communications Clemson University Clemson SC 29634 USA

4. Department of Bioengineering Clemson University Clemson SC 29634 USA

Abstract

Electrochemical‐based memristors are highly attractive that are capable of nonvolatile analog tuning, long‐term state stability, low power consumption, device scalability, and fast switching speeds. Through the combination of film deposition techniques, i.e., vapor phase polymerization and screen printing, fabrication of a poly(4‐(6‐hexyl)‐4H‐dithieno[3,2‐b:2′,3′‐d]pyrrole) (p6DTP)‐based synaptic‐emulating three‐terminal memristor is designed. Through voltage‐driven pulse programming, and square waves with an amplitude of 100 mV and duration of 100 msec, the device exhibits a power consumption of 1 pJmm2 per synaptic event. By analyzing the fundamental operational trends of the p6DTP‐based device, simple and advanced integrated applications can be demonstrated along with synaptic‐like responses. This effort is the first presentation of the vapor phase polymerization technique for any dithienopyrrole‐based monomers, along with the physical implementation of any memristive system as an advanced logical circuit, demonstrated here as a cascaded combinational logic gate.

Funder

National Science Foundation

Publisher

Wiley

Subject

Industrial and Manufacturing Engineering,Mechanics of Materials,General Materials Science

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