Low‐Temperature Poly‐Si Thin‐Film Transistor with High‐k ZrAlOx Gate Insulator with SiO2 Blocking Layer

Author:

Kim Yuna1,Jung Byunglib1,Islam Md Mobaidul1,Kim Byeonggwan1,Jang Jin1ORCID

Affiliation:

1. Advanced Display Research Center (ADRC) Department of Information Display Kyung Hee University 26, Kyungheedae‐ro, Dongdaemun‐gu Seoul 02447 Republic of Korea

Abstract

AbstractLow‐power electronic devices are of increasing interest with high‐k gate insulators (GI). Herein, the performance and stability of low‐temperature poly‐Si (LTPS) thin‐film transistors (TFTs) are investigated with two different GIs: spray pyrolyzed zirconiumaluminum oxide (ZAO) directly deposited on poly‐Si, and SiO2/ZAO stack GI. The LTPS TFT with SiO2/ZAO stack GI exhibits hysteresis free characteristics with a threshold voltage of −0.2 V, field‐effect mobility of 114.4 cm2 V−1 s−1, subthreshold swing of 0.10 V dec−1, and high on/off current ratio of 7.3 × 108, at a gate voltage sweeping ±6 V. The TFT exhibits very stable operation under negative bias temperature stress. The X‐ray photoelectron spectroscopy and high‐resolution transmission electron microscopy analyses demonstrate that the diffusion of Zr and Al into poly‐Si deteriorates device performance with ZAO only GI. A thin SiO2 on LTPS blocks the diffusion of Zr and Al, resulting the high‐performance and stable p‐type LTPS TFT with a high‐k SiO2/ZAO stack GI. Finally, a 7‐stage ring oscillator using LTPS TFTs with SiO2/ZAO stack GI is demonstrated, exhibiting an oscillation frequency of 7.49 MHz and a propagation delay of 9.54 ns at a supply voltage of 6 V, indicating its suitability for low‐power consumption TFT electronics and displays.

Funder

Ministry of Science and ICT, South Korea

Publisher

Wiley

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