Fully Printed Electrolyte‐Gated Transistor Formed in a 3D Polymer Reservoir with Laser Printed Drain/Source Electrodes

Author:

Cadilha Marques Gabriel1ORCID,Yang Liang123ORCID,Liu Yan1,Wollersen Vanessa14,Scherer Torsten14ORCID,Breitung Ben1ORCID,Wegener Martin12ORCID,Aghassi‐Hagmann Jasmin1ORCID

Affiliation:

1. Institute of Nanotechnolgy Karlsruhe Institute of Technology Herman‐von‐Helmholtz‐Platz 1 76344 Eggenstein‐Leopoldshafen Germany

2. Institute of Applied Physics (APH) Karlsruhe Institute of Technology (KIT) Wolfgang‐Gäde‐Straße 1 76128 Karlsruhe Germany

3. Suzhou Institute for Advanced Research University of Science and Technology of China (USTC) Suzhou 215127 China

4. Karlsruhe Micro Nano Facility (KMNFi) Eggenstein‐Leopoldshafen Research Center Wolfgang‐Gäde‐Straße 2 76344 Eggenstein‐Leopoldshafen Germany

Abstract

AbstractIn solution processed electronic devices it is crucial that the deposited inks are properly aligned and that all post‐processing steps are compliant with each other. Moreover, shorter channel lengths are highly beneficial to increase the device performance. Herein, laser printing of metals and polymer reservoirs allows to print sub‐micrometer sized channel lengths while confining functional inks into these small gaps. Therefore, a manufacturing concept and optimized material stack, suitable for combined inkjet and laser printing are proposed. A nanoparticulate indium oxide (In2O3) semiconductor is inkjet printed into and constrained by a 3D laser written polymer (pentaerythritol triacrylate, PETA) reservoir. Inside the 3D printed polymer reservoir, platinum (Pt) electrodes, that are further routed over the reservoir walls, are laser printed by a metal reduction process. The transistor fabrication is completed by a second inkjet printed layer of composite solid polymer electrolyte and an organic top‐gate layer (PEDOT:PSS). This concept does not exceed annealing temperatures higher than 100 °C, and is compatible with a range of substrates. The characterized electrolyte‐gated field‐effect transistor show a reasonable on/off‐ratio in the range of 104 with negligible leakage currents. This materials and hybrid device manufacturing scheme has believed great potential for bioelectronics, lab‐on‐a‐chip applications and others.

Funder

Deutsche Forschungsgemeinschaft

Carl-Zeiss-Stiftung

National Natural Science Foundation of China

Publisher

Wiley

Subject

Industrial and Manufacturing Engineering,Mechanics of Materials,General Materials Science

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