An SEM based system for a complete characterization of latch-up in CMOS integrated circuits

Author:

Canali C.,Fantini F.,Giannini M.,Senin A.,Vanzi M.,Zanoni E.

Publisher

Wiley

Subject

Instrumentation,Atomic and Molecular Physics, and Optics

Reference19 articles.

1. Burns D J Kendall J M Imaging latch-up sites in LSI CMOS with a laser photoscanner 1983 118 121

2. Davidson S M Latch-up and timing failure analysis of CMOS VLSI using electron beam techniques 130 137

3. Dressendorfer P V Armendariz M G A SEM technique for experimentally locating latch-up paths in integrated circuits 1980 1688 1693

4. Eistreich D B The physics and modelling of latch-up and CMOS Integrated Circuits 1980

5. Fantini F Morandi C Vanzi M Zanoni E Observation of latch-up phenomena in CMOS ICs by means of digital differential voltage contrast

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