In‐Materia Annealing and Combinatorial Optimization Based on Vertical Memristive Array

Author:

Lee Soo Hyung1ORCID,Cheong Sunwoo1ORCID,Cho Jea Min1,Ghenzi Néstor1ORCID,Shin Dong Hoon1ORCID,Jang Yoon Ho1ORCID,Han Janguk1ORCID,Park Tae Won1ORCID,Kim Dong Yun1,Shim Sung Keun1ORCID,Han Joon‐Kyu2ORCID,Kim Seung Soo1,Hwang Cheol Seong1ORCID

Affiliation:

1. Department of Materials Science and Engineering and Inter‐University Semiconductor Research Center College of Engineering Seoul National University Seoul 08826 Republic of Korea

2. System Semiconductor Engineering and Department of Electronic Engineering Sogang University 35 Baekbeom‐ro, Mapo‐gu Seoul 04107 Republic of Korea

Abstract

AbstractDue to its area and energy efficiency, a memristive crossbar array (CBA) has been extensively studied for various combinatorial optimization applications, from network problems to circuit design. However, conventional approaches include heavily burdening software fine‐tuning for the annealing process. Instead, this study introduces the “in‐materia annealing” method, where the inter‐layer interference of vertically stacked memristive CBA is utilized as an annealing method. When mapping combinatorial optimization problems into the configuration layer of the CBA, exponentially decaying annealing profiles are generated in nearby noise layers. Moreover, in‐materia annealing profiles can be controlled by changing compliance current, read voltage, and read pulse width. Therefore, the annealing profiles can be arbitrarily controlled and generated individually for each cell, providing rich noise sources to solve the problem efficiently. Consequently, the experimental and simulation of Max‐Cut and weighted Max‐Cut problems achieve notable results with the minimum software burden.

Funder

National Research Foundation of Korea

Publisher

Wiley

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