Efficient hardware‐accelerated pseudoinverse computation through algorithm restructuring for parallelization in high‐level synthesis-Reference-Cited by-同舟云学术

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Efficient hardware‐accelerated pseudoinverse computation through algorithm restructuring for parallelization in high‐level synthesis

Published:2021-10-18 Issue:2 Volume:50 Page:394-416
ISSN:0098-9886
Container-title:International Journal of Circuit Theory and Applications
language:en
Short-container-title:Circuit Theory & Apps

Author:

Tan Chong Yeam¹,Ooi Chia Yee¹^ORCID,Choo Hau Sim¹,Ismail Nordinah¹

Affiliation:

1. Malaysia‐Japan International Institute of Technology Universiti Teknologi Malaysia Kuala Lumpur Malaysia

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/cta.3155

Reference39 articles.

1. Accelerating extreme learning machine on FPGA by hardware implementation of given rotation‐QRD;Chong Yeam T;Int J Integr Eng,2019

2. WITHDRAWN: Ceramic art image design based on FPGA and machine learning algorithm

3. Hardware implementation of real-time Extreme Learning Machine in FPGA: Analysis of precision, resource occupation and performance

4. RaoC MitraS.Generalized inverse of a matrix and its applications. Proceedings of the Sixth Berkeley Symposium on Mathematical Statistics and Probability. Volume 1: Theory of Statistics The Regents of the University of California;1972.

5. DoQL.Numerically efficient methods for solving least squares problems;2012.

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FPGA Simulation for Computing Pseudoinverse Matrices;2023 20th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE);2023-10-25

2. A heterogeneous hardware scheme for accelerating the image reconstruction process of electrical tomography;Measurement Science and Technology;2023-06-29

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