A high‐resolution all‐digital pulse‐width modulator architecture with a tunable delay element in CMOS-Reference-Cited by-同舟云学术

A high‐resolution all‐digital pulse‐width modulator architecture with a tunable delay element in CMOS

Published:2020-04-27 Issue:8 Volume:48 Page:1329-1345
ISSN:0098-9886
Container-title:International Journal of Circuit Theory and Applications
language:en
Short-container-title:Int J Circ Theor Appl

Author:

Morales Juan Ignacio¹^ORCID,Chierchie Fernando¹^ORCID,Mandolesi Pablo Sergio¹²,Paolini Eduardo Emilio¹²^ORCID

Affiliation:

1. Instituto de Investigaciones en Ing. Eléctrica (IIIE) Alfredo Desages (UNS‐CONICET), Depto. de Ing. Eléctrica y de ComputadorasUniversidad Nacional del Sur Bahía Blanca Argentina

2. Comisión de Investigaciones Científicas de la Provincia de Buenos Aires (CIC) Buenos Aires Argentina

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/cta.2803

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4. GerasimovVA.FPGA‐based implementation of a high resolution and high carrier frequency pulse‐width modulator. In: 2017 International Conference on Industrial Engineering Applications and Manufacturing (ICIEAM);2017:1‐5.

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