Vertical double-gate MOSFET device technology

Author:

Masahara Meishoku,Liu Yongxun,Endo Kazuhiko,Matsukawa Takashi,Suzuki Eiichi

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Networks and Communications,General Physics and Astronomy,Signal Processing

Reference10 articles.

1. Calculated threshold-voltage characteristics of an XMOS transistor having an additional bottom gate;Sekigawa;Solid-State Electron,1984

2. Hisamoto D, Lee W, Kedzierski J, Anderson E, Takeuchi H, Asano K, King T, Bokor J, Hu C. A folded-channel MOSFET for deep-sub-tenth micron era. Tech Dig IEDM, p 1032- 1034, San Francisco, 1998.

3. Masahara M, Matsukawa T, Ishii K, Liu Y, Tanoue H, Sakamoto K, Sekigawa T, Yamauchi H, Kanemaru S, Suzuki E. 15-nm-thick Si channel wall vertical double-gate MOSFET. Tech Dig IEDM, p 949- 951, San Francisco, 2002.

4. Hergenrother JM et al. The vertical replacement-gate (VRG) MOSFET. Tech Dig IEDM, p 73- 75, Washington, 1999.

5. Ultrathin channel vertical double-gate MOSFET fabricated by using ion-bombardment-retarded etching;Masahara;IEEE Trans Electron Devices,2004

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