VLSI Architectures for Image Interpolation: A Survey

Author:

Moses C. John1,Selvathi D.2,Sophia V. M. Anne1

Affiliation:

1. Department of ECE, St. Xavier’s Catholic College of Engineering, Nagercoil 629003, India

2. Department of ECE, Mepco Schlenk Engineering College, Sivakasi 626005, India

Abstract

Image interpolation is a method of estimating the values at unknown points using the known data points. This procedure is used in expanding and contrasting digital images. In this survey, different types of interpolation algorithm and their hardware architecture have been analyzed and compared. They are bilinear, winscale, bi-cubic, linear convolution, extended linear, piecewise linear, adaptive bilinear, first order polynomial, and edge enhanced interpolation architectures. The algorithms are implemented for different types of field programmable gate array (FPGA) and/or by different types of complementary metal oxide semiconductor (CMOS) technologies like TSMC 0.18 and TSMC 0.13. These interpolation algorithms are compared based on different types of optimization such as gate count, frequency, power, and memory buffer. The goal of this work is to analyze the different very large scale integration (VLSI) parameters like area, speed, and power of various implementations for image interpolation. From the survey followed by analysis, it is observed that the performance of hardware architecture of image interpolation can be improved by minimising number of line buffer memory and removing superfluous arithmetic elements on generating weighting coefficient.

Publisher

Hindawi Limited

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Hardware and Architecture

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Sector-Selective Hybrid Scheme Facilitating Hardware Supportability Over Image Compression;Intelligent Algorithms in Software Engineering;2020

2. Adaptive and Non-adaptive Image Interpolation Techniques;2015 International Conference on Computing Communication Control and Automation;2015-02

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