Affiliation:
1. Nanoelectronics Research Centre, Department of Electronics and Electrical Engineering, University of Glasgow, Glasgow G12 8LT, Scotland
Abstract
It has been known for many years that interface roughness scattering, particularly off
the Si/SiO2 interface, is a limiting factor in device performance of MOSFETs. This
becomes increasingly important as gate lengths are shrunk to decanano dimensions
along with the move towards SiGe hetero-technology. However, analysis of interface
transport is hampered by the lack of detailed physical models, especially for surfaces
where intercalation occurs. This paper presents an efficient method for following the
motion of wave-packets scattering off a rough interface. We are also able to calculated
directly ab-initio interface scattering rates for use in Monte Carlo simulations.
Funder
Engineering and Physical Sciences Research Council
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Hardware and Architecture
Cited by
2 articles.
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