Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems-Reference-Cited by-同舟云学术

Macrocell Builder: IP-Block-Based Design Environment for High-Throughput VLSI Dedicated Digital Signal Processing Systems

Published:2006-01-30 Issue:1 Volume:2006 Page:
ISSN:1687-6180
Container-title:EURASIP Journal on Advances in Signal Processing
language:en
Short-container-title:EURASIP J. Adv. Signal Process.

Author:

Zergainoh Nacer-Eddine,Tambour Ludovic,Urard Pascal,Jerraya Ahmed Amine

Publisher

Springer Science and Business Media LLC

Link

http://link.springer.com/content/pdf/10.1155/ASP/2006/28636.pdf

Reference34 articles.

1. International Technology Roadmap for Semiconductors, 2003 Edition Report, http://public.itrs.net

2. Sangiovanni-Vincentelli A, Carloni L, De Bernardinis F, Sgroi M: Benefits and challenges for platform-based design. Proceedings of 41st IEEE Design Automation Conference (DAC '04), June 2004, San Diego, Claif, USA 409-414.

3. Martin G: Design methodologies for system level IP. Proceedings of IEEE Design, Automation and Test in Europe (DATE~'98), February 1998, Paris, France 286-289.

4. Gajski DD, Wu AC-H, Chaiyakul V, Mori S, Nukiyama T, Bricaud P: Essential issues for IP reuse. Proceedings of IEEE Asia and South Pacific Design Automation Conference (ASP-DAC '00), January 2000, Yokohama, Japan 37-42.

5. Parhi KK: VLSI Digital Signal Processing Systems: Design and Implementation. John Wiley & Sons, New York, NY, USA; 1998.

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Accurate Area, Time and Power Models for FPGA-Based Implementations;Journal of Signal Processing Systems;2009-06-19

2. Simulink-based MPSoC Design: New Approach to Bridge the Gap between Algorithm and Architecture Design;IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07);2007