A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design-Reference-Cited by-同舟云学术

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A Generic Three-Sided Rearrangeable Switching Network for Polygonal FPGA Design

Published:2013-12-11 Issue: Volume:2013 Page:1-15
ISSN:1065-514X
Container-title:VLSI Design
language:en
Short-container-title:VLSI Design

Author:

Yen Mao-Hsu¹^ORCID,Yu Chu²^ORCID,Liao Horng-Ru³,Hsieh Chin-Fa³

Affiliation:

1. Department of Computer Science and Information Engineering, National Taiwan Ocean University, 2 Pei-Ning Road, Keelung 202-24, Taiwan

2. Department of Electronic Engineering, National Ilan University, 1, Sec. 1, Shen-Lung Road, I-Lan 260, Taiwan

3. Department of Electronic Engineering, China University of Science and Technology, 245, Sec. 3, Academia Road, Nangang District, Taipei City 115, Taiwan

Funder

National Science Council

Publisher

Hindawi Limited

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Hardware and Architecture

Link

http://downloads.hindawi.com/archive/2013/103473.pdf

Reference17 articles.

1. Flexibility of interconnection structures for field-programmable gate arrays

2. An embedded, FPGA-based computer graphics coprocessor with native geometric algebra support

3. On Rearrangeable Three-Stage Connecting Networks

4. On a class of rearrangeable networks

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