Cryptography-Based Medical Signal Securing Using Improved Variation Mode Decomposition with Machine Learning Techniques

Author:

Shukla Piyush1,Akanbi Oluwatobi2,Atuah Asakipaam Simon3ORCID,Aljaedi Amer4ORCID,Bouye Mohamed5,Sharma Shakti6

Affiliation:

1. UIT-RGPV, Bhopal, India

2. Computer Science Department, University of Colorado, Colorado Springs, CO 80918, USA

3. Department of Telecommunication Engineering, KNUST (Kwame Nkrumah University of Science and Technology), Ghana

4. College of Computing and Information Technology, University of Tabuk, Tabuk 71491, Saudi Arabia

5. Department of Mathematics, College of Science, King Khalid University, Abha, Saudi Arabia

6. School of Computer Science Engineering & Technology, Bennett University, India

Abstract

There is no question about the value that digital signal processing brings to the area of biomedical research. DSP processors are used to sample and process the analog inputs that are received from a human organ. These inputs come from the organ itself. DSP processors, because of their multidimensional data processing nature, are the electrical components that take up the greatest space and use the most power. In this age of digital technology and electronic gizmos, portable biomedical devices represent an essential step forward in technological advancement. Electrocardiogram (ECG) units are among the most common types of biomedical equipment, and their functions are absolutely necessary to the process of saving human life. In the latter part of the 1990s, portable electrocardiogram (ECG) devices began to appear on the market, and research into their signal processing and electronics design capabilities continues today. System-on-chip (SoC) design refers to the process through which the separate computing components of a DSP unit are combined onto a single chip in order to achieve greater power and space efficiency. In the design of biomedical DSP devices, this body of research presents a number of different solutions for reducing power consumption and space requirements. Using serial or parallel data buses, which are often the region that consumes the most power, it is possible to send data between the system-on-chip (SoC) and other components. To cut down on the number of needless switching operations that take place during data transmission, a hybrid solution that makes use of the shift invert bus encoding scheme has been developed. Using a phase-encoded shift invert bus encoding approach, which embeds the two-bit indication lines into a single-bit encoded line, is one way to solve the issue of having two distinct indicator bits. This method reduces the problem. The PESHINV approach is compared to the SHINV method that already exists, and the comparison reveals that the suggested PESHINV method reduces the total power consumption of the encoding circuit by around 30 percent. The computing unit of the DSP processor is the target of further optimization efforts. Virtually, all signal processing methods need memory and multiplier circuits to function properly.

Funder

King Khalid University

Publisher

Hindawi Limited

Subject

General Mathematics,General Medicine,General Neuroscience,General Computer Science

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