Analysis of Power Transfer Efficiency of Standard Integrated Circuit Immunity Test Methods

Author:

Huynh Hai Au1,Lee Hak-Tae2,Nah Wansoo1,Kim SoYoung1

Affiliation:

1. College of Information and Communication Engineering, Sungkyunkwan University, Suwon, Gyeonggi-Do 440-746, Republic of Korea

2. Department of Aerospace Engineering, Inha University, Incheon 402-751, Republic of Korea

Abstract

Direct power injection (DPI) and bulk current injection (BCI) methods are defined in IEC 62132-3 and IEC 62132-4 as the electromagnetic immunity test method of integrated circuits (IC). The forward power measured at the RF noise generator when the IC malfunctions is used as the measure of immunity level of the IC. However, the actual power that causes failure in ICs is different from forward power measured at the noise source. Power transfer efficiency is used as a measure of power loss of the noise injection path. In this paper, the power transfer efficiencies of DPI and BCI methods are derived and validated experimentally with immunity test setup of a clock divider IC. Power transfer efficiency varies significantly over the frequency range as a function of the test method used and the IC input impedance. For the frequency range of 15 kHz to 1 GHz, power transfer efficiency of the BCI test was constantly higher than that of the DPI test. In the DPI test, power transfer efficiency is particularly low in the lower test frequency range up to 10 MHz. When performing the IC immunity tests following the standards, these characteristics of the test methods need to be considered.

Funder

National Research Foundation of Korea

Publisher

Hindawi Limited

Subject

Electrical and Electronic Engineering

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