CMOS Image Sensor with On-Chip Image Compression: A Review and Performance Analysis

Author:

Zhang Milin1,Bermak Amine1

Affiliation:

1. Smart Sensory Integrated Systems (S2IS) Lab, Electronic and Computer Engineering Department, Hong Kong University of Science and Technology, Kowloon, Hong Kong

Abstract

Demand for high-resolution, low-power sensing devices with integrated image processing capabilities, especially compression capability, is increasing. CMOS technology enables the integration of image sensing and image processing, making it possible to improve the overall system performance. This paper reviews the current state of the art in CMOS image sensors featuring on-chip image compression. Firstly, typical sensing systems consisting of separate image-capturing unit and image-compression processing unit are reviewed, followed by systems that integrate focal-plane compression. The paper also provides a thorough review of a new design paradigm, in which image compression is performed during the image-capture phase prior to storage, referred to as compressive acquisition. High-performance sensor systems reported in recent years are also introduced. Performance analysis and comparison of the reported designs using different design paradigm are presented at the end.

Funder

Research Grants Council, University Grants Committee

Publisher

Hindawi Limited

Subject

Electrical and Electronic Engineering,Instrumentation,Control and Systems Engineering

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