Design Ratio-Memory Cellular Neural Network (RMCNN) in CMOS Circuit Used in Association-Memory Applications for 0.25 mm Silicon Technology

Abstract

The paper is proposed the Ratio-Memory Cellular Neural Network (RMCNN) that structure with the self-feedback and the modified Hebbian learning algorithm. The learnable RMCNN architecture was designed and realized in CMOS technology for associative memory neural network applications. The exemplar patterns can be learned and correctly recognized the output patterns for the proposed system. Only self-output pixel value in A template and B template weights are updated by the nearest neighboring five elements for all test input exemplar patterns. The learned ratio weights of the B template are generated that the catch weights are performed the summation of absolute coefficients operation to enhance the feature of recognized pattern. Simulation results express that the system can be learned some exemplar patterns with noise and recognized the correctly pattern. The 9×9 RMCNN structure with self-feedback and the modified Hebbian learning algorithm is implemented and verified in the CMOS circuits for TSMC 0.25 µm 1P5M VLSI technology. The proposed RMCNN have more learning and recognition capability for the variant exemplar patterns in the auto-associative memory neural system applications.