Affiliation:
1. Department of Electronics and Telecommunication, College of Engineering, Pune, Maharashtra, India
Abstract
Background:
For high computation, parallel and distributed processing chip multiprocessors
are widely used. In chip multiprocessors, large on chip cache memories are used for performance
improvement and speedy execution of the task. These cache memories consume 13% to 45%
of the overall power consumed by the entire chip. As chip size shrinks with technology scaling, static
energy consumed by the chip increases. This results in heating and chip malfunctioning. To solve
this problem we apply static energy reduction techniques to Last Level Cache (LLC) to reduce static
energy consumption and thereby chip temperature rise.
Methods:
Static energy reduction is achieved with two methods.
DIM_OLY_SEL Policy:- In this policy, static Energy Reduction is achieved by dimming cache
banks.
DIM_DARK_PAT Policy:- In this method, dimming as well as darkening techniques are used to
save static energy and thereby, temperature reduction.
Results:
With the implementation of DIM_OLY_SEL policy LLC, Temperature Reduction up to
1.4 Kelvin, improvements in EDP (Energy Delay Product) gains up to 28% and leakage energy Saving
up to 23% is observed.
With the implementation of DIM_DARK_PAT, we observed LLC temperature reduction up to 4.7
Kelvin, EDP gain improvement of 33 % and leakage energy saving 23%.
Conclusion:
DIM_OLY_SEL and DIM_DARK_PAT Policies are observed to be very effective
policies for energy saving and chip temperature reduction. Hence, they can be used effectively for
safe chip multiprocessor functioning.
Publisher
Bentham Science Publishers Ltd.
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials