Investigation and Reliability Analysis of Fifteen-level Asymmetrical Multilevel Inverter Topology using Nearest Level Control Technique with low Component Count

Author:

Roy Abeera D.1ORCID,Umayal Chandrahasan1ORCID

Affiliation:

1. School of Electrical Engineering, Vellore Institute of Technology, Chennai, India

Abstract

Background:: In multilevel inverters (MLI) as the number of level increases, there is a proportionate increase in the count of the semiconductor devices that are employed. Methods:: An asymmetrical multilevel inverter topology using a bidirectional switch is presented which employs lesser number of power electronic devices to produce fifteen levels at the output voltage. Nearest Level modulation (NLM) technique is used to generate the switching pulses and reliability analysis is performed using Markov reliability methodology. The operating principle of the proposed MLI and its performance abilities is verified through MATLAB/Simulink and a prototype is developed to provide the experimental results. Results:: Total Harmonic Distortion (THD) is computed for proposed MLI for different types of loads in simulation environment as well as in the developed hardware prototype. The fifteen level is achieved by using only 9 switches and 3 DC sources in comparison to the 28 switches and 6 DC sources required by the traditional cascaded H-bridge inverter. Conclusion:: The simulation and hardware results confirm the suitability of the proposed fifteen level MLI as the total component count and the requirement of DC sources reduces considerably.

Publisher

Bentham Science Publishers Ltd.

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

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