Clustering of behavioral phases in FSMs and its applications to VLSI test

Author:

Li Huawei,Min Yinghua,Li Zhongcheng

Publisher

Science China Press., Co. Ltd.

Subject

General Computer Science

Reference14 articles.

1. McCluskey, E. J., Logic Design Principles, New Jersey: Prentice Hall, Englewood Cliffs: A Division of Simon & Schuster, Inc., 1986.

2. Einspahr, K. L., Mehta, S. K., Seth, S. C., A synthesis for testability scheme for finite state machines using clock control, IEEE Transactions on Computer-Aided Design, 1999, 18(12): 1780–1792.

3. Niermann, T. M., Patel, J. H., HITEC: A test generation package for sequential circuits, Proc. of European Design Automation Conf., Amsterdam: IEEE Computer Society Press, 1991, 214–218.

4. Pomeranz, I., Reddy, S. M., Test generation for synchronous sequential circuits using multiple observation times, Proc. of 21st Fault-Tolerant Computing Symposium, Montreal: IEEE Computer Society Press, 1991, 52–59.

5. Li, Z., Pan, Y., Min, Y., SABATPG: A structural analysis based automatic test pattern generation system, Science in China (Series A), 1994, 37(9): 1104–1114.

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