Formal verification of UML state diagrams

Author:

Choppy Christine1,Klai Kais1,Zidani Hacene1

Affiliation:

1. LIPN, CNRS UMR 7030, Université Paris 13, Villetaneuse, France

Abstract

In spite of its informal semantics and of some ambiguities, UML is a widespread modelling language used in both industry and academia. On the other hand, Petri nets are a mathematical modelling language with a formal semantics and are well suited for formal verification. However, altough there is a growing interest in model checking techniques from industry, the software engineers continue to be unfamiliar with such a formalism. For that reason, it is convenient to supply formal verification techniques of UML diagrams that are completely automatic and transparent to the designer. This is the issue discussed in this paper. We propose to translate UML state diagrams into Coloured Petri nets on which verification of some desired properties can be checked automatically. We show on our example that, when expected properties are not checked, this is an opportunity to revise the model into a more adequate one

Publisher

Association for Computing Machinery (ACM)

Reference26 articles.

1. Systems and Software Verification

2. Dependability analysis in the early phases of UML -based system design;Bondavalli Andrea;Comput. Syst. Sci. Eng.,2001

3. Lecture Notes in Computer Science;Baresi Luciano,2001

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