Affiliation:
1. Centre for Research and Technology, Hellas 8 University of Thessaly
Abstract
This article introduces a significance-centric programming model and runtime support that sets the supply voltage in a multicore CPU to sub-nominal values to reduce the energy footprint and provide mechanisms to control output quality. The developers specify the significance of application tasks respecting their contribution to the output quality and provide check and repair functions for handling faults. On a multicore system, we evaluate five benchmarks using an energy model that quantifies the energy reduction. When executing the least-significant tasks unreliably, our approach leads to 20% CPU energy reduction with respect to a reliable execution and has minimal quality degradation.
Funder
Seventh Framework Programme
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture,Information Systems,Software
Cited by
7 articles.
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1. ARETE: Accurate Error Assessment via Machine Learning-Guided Dynamic-Timing Analysis;IEEE Transactions on Computers;2023-04-01
2. Instruction-aware Learning-based Timing Error Models through Significance-driven Approximations;2022 IEEE 40th International Conference on Computer Design (ICCD);2022-10
3. HPAC;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2021-11-13
4. Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors;2021 IEEE International Symposium on Workload Characterization (IISWC);2021-11
5. Exploring the potential of context-aware dynamic CPU undervolting;Proceedings of the 18th ACM International Conference on Computing Frontiers;2021-05-11