FPGA-Based Dynamically Reconfigurable SQL Query Processing

Author:

Ziener Daniel1,Bauer Florian1,Becher Andreas1,Dennl Christopher1,Meyer-Wegener Klaus1,Schürfeld Ute2,Teich Jürgen1,Vogt Jörg-Stephan2,Weber Helmut2

Affiliation:

1. Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Erlangen, Germany

2. IBM Deutschland Research & Development GmbH, Böblingen, Germany

Abstract

In this article, we propose an FPGA-based SQL query processing approach exploiting the capabilities of partial dynamic reconfiguration of modern FPGAs. After the analysis of an incoming query, a query-specific hardware processing unit is generated on the fly and loaded on the FPGA for immediate query execution. For each query, a specialized hardware accelerator pipeline is composed and configured on the FPGA from a set of presynthesized hardware modules. These partially reconfigurable hardware modules are gathered in a library covering all major SQL operations like restrictions and aggregations, as well as more complex operations such as joins and sorts. Moreover, this holistic query processing approach in hardware supports different data processing strategies including row- as column-wise data processing in order to optimize data communication and processing. This article gives an overview of the proposed query processing methodology and the corresponding library of modules. Additionally, a performance analysis is introduced that is able to estimate the processing time of a query for different processing strategies and different communication and processing architecture configurations. With the help of this performance analysis, architectural bottlenecks may be exposed and future optimized architectures, besides the two prototypes presented here, may be determined.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Reference25 articles.

1. Column-stores vs. row-stores

2. Energy-aware SQL query acceleration through FPGA-based dynamic partial reconfiguration

3. Go Ahead: A Partial Reconfiguration Framework

4. Mark Bourgeault. 2011. Alteras Partial Reconfiguration Flow. Available online: http://www.eecg.utoronto.ca/∼jayar/FPGAseminar/FPGA-Bourgeault-June23-2011.pdf. Mark Bourgeault. 2011. Alteras Partial Reconfiguration Flow. Available online: http://www.eecg.utoronto.ca/∼jayar/FPGAseminar/FPGA-Bourgeault-June23-2011.pdf.

5. Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systems

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