High performance parallel logic simulations on a network of workstations-Reference-Cited by-同舟云学术

High performance parallel logic simulations on a network of workstations

Published:1993-07 Issue:1 Volume:23 Page:76-84
ISSN:0163-6103
Container-title:ACM SIGSIM Simulation Digest
language:en
Short-container-title:SIGSIM Simul. Dig.

Author:

Manjikian Naraig,Loucks Wayne M.

Abstract

An approach for high performance parallel logic simulation on a local area network of workstation computers is discussed in this paper. The single, shared transmission medium often found in such networks places limitations on parallel execution, hence a reduction in the frequency of synchronization is pursued by combining a circuit partitioning methodology with a specific synchronization constraint. A consequence of the partitioning methodology is replication of objects between blocks of a partition. A partitioning procedure based on iterative improvement is described for reducing replication while preserving load balance. Two interprocessor synchronization techniques for parallel simulation are studied: conservative and optimistic synchronization. Experiments conducted on three large sequential circuits indicate that reasonable speedup is achievable for well-balanced partitions, and that optimistic synchronization provides a modest improvement in performance over conservative synchronization.

Publisher

Association for Computing Machinery (ACM)

Link

https://dl.acm.org/doi/pdf/10.1145/174134.158469

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