Secure Data-Binding in FPGA-based Hardware Architectures utilizing PUFs-Reference-Cited by-同舟云学术

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Secure Data-Binding in FPGA-based Hardware Architectures utilizing PUFs

Published:2024-07 Issue: Volume:63 Page:423-435
ISSN:
Container-title:Proceedings of the 19th ACM Asia Conference on Computer and Communications Security
language:
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Author:

Frank Florian¹^ORCID,Schmid Martin¹^ORCID,Klement Felix¹^ORCID,Palani Purushothaman²^ORCID,Weber Andreas¹^ORCID,Kavun Elif Bilge¹^ORCID,Xiong Wenjie³^ORCID,Arul Tolga¹^ORCID,Katzenbeisser Stefan¹^ORCID

Affiliation:

1. University of Passau, Passau, Germany

2. Virginia Tech, Blacksburg, USA

3. Virginia Tech, Blacksburg, United States

Funder

Deutsche Forschungsgemeinschaft

Bundesministerium für Bildung und Forschung

National Science Foundation

Air Force Office of Scientific Research

Publisher

ACM

Reference54 articles.

1. Inc. Advanced Micro Devices. 2021. System Integrated Logic Analyzer v1.1. Retrieved April 15, 2024 from https://docs.xilinx.com/v/u/en-US/pg261-systemila

2. Inc. Advanced Micro Devices. 2023. 7 Series Product Tables and Product Selection Guide (XMP101). Retrieved April 15, 2024 from https://docs.xilinx.com/v/u/en-US/7-series-product-selection-guide

3. Inc. Advanced Micro Devices. 2023. AXI DMA v7.1 LogiCORE IP Product Guide. Retrieved April 15, 2024 from https://docs.xilinx.com/r/en-US/pg021_axi_dma

4. Testing Physical Unclonable Functions Implemented on Commercial Off-the-Shelf NAND Flash Memories Using Programming Disturbances

5. A PUF design for secure FPGA-based embedded systems

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