Affiliation:
1. Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN
Abstract
The binary number representation has dominated digital logic for decades due to its compact storage requirements. An alternative representation is the unary number system: We use
N
bits, from which the first
M
are 1 and the rest are 0 to represent the value
M/N
. One-hot representation is a variation of the unary number system where it has one 1 in the
N
bits, where the 1’s position represents its value. We present a novel method that first converts binary numbers to unary using thermometer (one-hot) encoders and then uses a “scaling network” followed by voting gates that we call “alternator logic,” followed by a decoder to convert the numbers back to the binary format. For monotonically increasing functions, the scaling network is all we need, which essentially uses only the routing resources and flip-flops on a typical FPGA architecture. Our method is clearly superior to the conventional binary implementation: Our area×delay cost is on average only 0.4%, 4%, and 39% of the binary method for 8-, 10-, and 12-bit resolutions, respectively, in thermometer encoding scheme, and 0.5%, 15%, and 147% in the one-hot encoding scheme. In terms of power efficiency, our one-hot method is between about 69× and 114× better compared to conventional binary.
Funder
National Science Foundation
Publisher
Association for Computing Machinery (ACM)
Cited by
2 articles.
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1. Constant Coefficient Multipliers Using Self-Similarity-Based Hybrid Binary-Unary Computing;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
2. Optimizing Hybrid Binary-Unary Hardware Accelerators Using Self-Similarity Measures;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05