Design for Eliminating Operation Specific Power Signatures from Digital Logic

Author:

Majumder Md Badruddoja1,Hasan Md Sakib1,Shanta Aysha1,Uddin Mesbah1,Rose Garrett1

Affiliation:

1. University of Tennessee, Knoxville, TN, USA

Funder

Air Force Office of Scientific Research

Publisher

ACM

Reference13 articles.

1. RIJID

2. Leon O. Chua and G.-N. Lin. 1990. Canonical realization of Chua's circuit family. IEEE transactions on Circuits and Systems Vol. 37 7 (1990) 885--902. Leon O. Chua and G.-N. Lin. 1990. Canonical realization of Chua's circuit family. IEEE transactions on Circuits and Systems Vol. 37 7 (1990) 885--902.

3. Richard O. Duda Peter E. Hart and David G. Stork. 2000. Pattern classification (pt. 1). Danvers MA: Wiley Interscience (2000). Richard O. Duda Peter E. Hart and David G. Stork. 2000. Pattern classification (pt. 1). Danvers MA: Wiley Interscience (2000).

4. Compact discrete-time chaos generator circuit

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