Functional verification methodology of Chameleon processor-Reference-Cited by-同舟云学术

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Functional verification methodology of Chameleon processor

Published:1996 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 33rd annual conference on Design automation conference - DAC '96
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Author:

Casaubieilh Françoise,Barrett Geoff,Berthet Christian,McIsaac Anthony,Benjamin Mike,Bartley Mike,Pogodalla François,Rocheteau Frédéric,Belhadj Mohamed,Eggleton Jeremy,Mas Gérard

Publisher

ACM Press

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Employed VeriLite simulation to improve SOC design and verification;Computer Applications in Engineering Education;2010-01-20

2. Using Model-Based Test Program Generator for Simulation Validation;Embedded Software and Systems;2005

3. Code-Based Test Generation for Validation of Functional Processor Descriptions;Tools and Algorithms for the Construction and Analysis of Systems;2003

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