A task-level hierarchical memory model for system synthesis of multiprocessors
Author:
Li Yanbing,Wolf Wayne
Cited by
3 articles.
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1. System-Level Design;Design Automation, Languages, and Simulations;2003-03-26
2. Low Power Distributed Embedded Systems: Dynamic Voltage Scaling and Synthesis;High Performance Computing — HiPC 2002;2002
3. System-Level Design;Knowledge Management;2001-03-28