TAFE-Reference-Cited by-同舟云学术

TAFE

Published:2020-09-30 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques
language:
Short-container-title:

Author:

Punniyamurthy Kishore¹,Gerstlauer Andreas¹

Affiliation:

1. The University of Texas at Austin, Austin, TX, USA

Funder

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3410463.3414641

Reference60 articles.

1. [n.d.]. SuiteSparse Matrix Collection. https://sparse.tamu.edu/. [n.d.]. SuiteSparse Matrix Collection. https://sparse.tamu.edu/.

2. 2009. GPGPUSim v3.2.2. GTX 480 Configuration. 2009. GPGPUSim v3.2.2. GTX 480 Configuration.

3. 2016. clSPARSE documentation. http://clmathlibraries.github.io/clSPARSE/index. html. 2016. clSPARSE documentation. http://clmathlibraries.github.io/clSPARSE/index. html.

4. 2017. CUDA OPTIMIZATION TIPS TRICKS AND TECHNIQUES. http://ondemand.gputechconf.com/gtc/2017/presentation/s7122-stephen-jones-cudaoptimization-tips-tricks-and-techniques.pdf. 2017. CUDA OPTIMIZATION TIPS TRICKS AND TECHNIQUES. http://ondemand.gputechconf.com/gtc/2017/presentation/s7122-stephen-jones-cudaoptimization-tips-tricks-and-techniques.pdf.

5. 2019. Intels Xe for HPC: Ponte Vecchio with Chiplets EMIB and Foveros on 7nm. https://www.anandtech.com/show/15119/intels-xe-for-hpc-ponte-vecchiowith-chiplets-emib-and-foveros-on-7nm-coming-2021. 2019. Intels Xe for HPC: Ponte Vecchio with Chiplets EMIB and Foveros on 7nm. https://www.anandtech.com/show/15119/intels-xe-for-hpc-ponte-vecchiowith-chiplets-emib-and-foveros-on-7nm-coming-2021.

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