Enhancing Address Translations in Throughput Processors via Compression-Reference-Cited by-同舟云学术

Enhancing Address Translations in Throughput Processors via Compression

Published:2020-09-30 Issue: Volume: Page:
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Container-title:Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques
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Author:

Tang Xulong¹,Zhang Ziyu¹,Xu Weizheng¹,Kandemir Mahmut Taylan²,Melhem Rami¹,Yang Jun¹

Affiliation:

1. University of Pittsburgh, Pittsburgh, PA, USA

2. The Pennsylvania State University, University Park, PA, USA

Funder

National Science Foundation

University of Pittsburgh

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3410463.3414633

Reference71 articles.

1. Unlocking bandwidth for GPUs in CC-NUMA systems

2. Do-It-Yourself Virtual Memory Translation

3. AMD Corp. 2016. I/O Virtualization Technology(IOMMU) Specification. https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf AMD Corp. 2016. I/O Virtualization Technology(IOMMU) Specification. https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdf

4. AMD Corp. 2017. Radeons Next-generation Vega Architecture. https://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf AMD Corp. 2017. Radeons Next-generation Vega Architecture. https://radeon.com/_downloads/vega-whitepaper-11.6.17.pdf

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