Hardware-Accelerated RNA Secondary-Structure Alignment

Author:

Moscola James1,Cytron Ron K.1,Cho Young H.2

Affiliation:

1. Washington University

2. University of Southern California

Abstract

The search for homologous RNA molecules---sequences of RNA that might behave simiarly due to similarity in their physical (secondary) structure---is currently a computationally intensive task. Moreover, RNA sequences are populating genome databases at a pace unmatched by gains in standard processor performance. While software tools such as Infernal can efficiently find homologies among RNA families and genome databases of modest size, the continuous advent of new RNA families and the explosive growth in volume of RNA sequences necessitate a faster approach. This work introduces two different architectures for accelerating the task of finding homologous RNA molecules in a genome database. The first architecture takes advantage of the tree-like configuration of the covariance models used to represent the consensus secondary structure of an RNA family and converts it directly into a highly-pipelined processing engine. Results for this architecture show a 24× speedup over Infernal when processing a small RNA model. It is estimated that the architecture could potentially offer several thousands of times speedup over Infernal on larger models, provided that there are sufficient hardware resources available. The second architecture is introduced to address the steep resource requirements of the first architecture. It utilizes a uniform array of processing elements and schedules all of the computations required to scan for an RNA homolog onto those processing elements. The estimated speedup for this architecture over the Infernal software package ranges from just under 20× to over 2,350×.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Hardware Inexact Grammar Parser;International Journal of Pattern Recognition and Artificial Intelligence;2017-04-11

2. Parallel Hardware Stochastic Context-Free Parsers;International Journal of Pattern Recognition and Artificial Intelligence;2016-04-12

3. A Scalable Unsegmented Multiport Memory for FPGA-Based Systems;International Journal of Reconfigurable Computing;2015

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