1. Zain Ul Abideen, Tiago Diadami Perez, Mayler Martins, and Samuel Pagliarini. 2023. A Security-aware and LUT-based CAD Flow for the Physical Synthesis of hASICs. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2023), 1–1.
2. Zain Ul Abideen, Tiago Diadami Perez, and Samuel Pagliarini. 2021. From FPGAs to Obfuscated eASICs: Design and Security Trade-offs. In 2021 Asian Hardware Oriented Security and Trust Symposium (AsianHOST). 1–4.
3. Achronix Data Acceleration. 2022. Speedcore Embedded FPGA IP. https://www.achronix.com/product/speedcore. Accessed: December 22, 2022.
4. Achronix Inc. 2022. Speedster7t FPGAs. https://www.achronix.com/high-speed-interfaces. Accessed: January 24, 2023.
5. Shah Agam. 2022. Europe, US warn of fake-chip danger to national security, critical systems. https://www.theregister.com/2022/03/18/eu_us_counterfeit_chips/. Accessed: September 25, 2022.