A Review of In-Memory Computing Architectures for Machine Learning Applications-Reference-Cited by-同舟云学术

A Review of In-Memory Computing Architectures for Machine Learning Applications

Published:2020-09-07 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2020 on Great Lakes Symposium on VLSI
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Author:

Bavikadi Sathwika¹,Sutradhar Purab Ranjan²,Khasawneh Khaled N.¹,Ganguly Amlan²,Pudukotai Dinakarrao Sai Manoj¹

Affiliation:

1. George Mason University, Fairfax, VA, USA

2. Rochester Institute of Technology, Rochester, NY, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3386263.3407649

Reference33 articles.

1. M Courbariaux and Yoshua Bengio. 2016. BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1. ArXiv (2016). M Courbariaux and Yoshua Bengio. 2016. BinaryNet: Training Deep Neural Networks with Weights and Activations Constrained to +1 or -1. ArXiv (2016).

2. A Mustafa etal 2020 a. IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array. IEEE Transactions on Circuits and Systems I: Regular Papers (2020). A Mustafa et al. 2020 a. IMAC: In-Memory Multi-Bit Multiplication and ACcumulation in 6T SRAM Array. IEEE Transactions on Circuits and Systems I: Regular Papers (2020).

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