Hardware-assisted Memory Tracing on New SoCs Embedding FPGA Fabrics

Author:

Li Letitia W.,Duc Guillaume,Pacalet Renaud

Publisher

ACM Press

Reference22 articles.

1. Altera socs: When architecture matters: https://www.altera.com/products/soc/overview.html.

2. AXI reference guide: http://www.xilinx.com/support/documentation/ip_documentation/ug761_axi_reference_guide.pdf.

3. BusyBox: http://www.busybox.net.

4. RAMspeed: http://alasir.com/software/ramspeed.

5. Secbus, a hardware / software architecture protecting the external memories of an soc: https://secbus.telecom-paristech.fr/.

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1. Breaking TrustZone memory isolation and secure boot through malicious hardware on a modern FPGA-SoC;Journal of Cryptographic Engineering;2021-09-15

2. PoW-How: An Enduring Timing Side-Channel to Evade Online Malware Sandboxes;Computer Security – ESORICS 2021;2021

3. Analyzing memory accesses with modern processors;Proceedings of the 16th International Workshop on Data Management on New Hardware;2020-06-14

4. Breaking TrustZone Memory Isolation through Malicious Hardware on a Modern FPGA-SoC;Proceedings of the 3rd ACM Workshop on Attacks and Solutions in Hardware Security Workshop - ASHES'19;2019

5. How to Break Secure Boot on FPGA SoCs Through Malicious Hardware;Lecture Notes in Computer Science;2017

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